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NXP PN512 13.56MHz NFC处置赏罚赏罚妄图

宣布时间:2011年07月13日 14:07    宣布者:Liming
要害词: NFC , NXP , PN512
NXP公司的PN512是使命频率为13.56MHz的高度集成收发器IC,主要用在使命频率为13.56MHz的无接触通讯,通讯距离为50mm.PN512支持四种不合的使命形式: ISO/IEC 14443A/MIFARE 和FeliCa读/写器, ISO/IEC 14443B 读/写器, ISO/IEC 14443A/MIFARE和FeliCa 卡形式和NFCIP-1形式.通讯速率高达424 kbps,器件集成了CRC协处置赏罚赏罚器,外部有自检测试和可编程的I/O引脚.本文简介了PN512主要特点和优势, 方框图和多种读/写形式框图, 尺度应用电路和PN51x 演示板电路图, 和天线间的镌汰年夜和匹,PCB结构图与基于PN512的OM5597/RD2612 POS参考设计框图.

The PN512 is a highly integrated transceiver IC for contactless communication at 13.56 MHz. This transceiver IC utilizes an outstanding modulation and demodulation concept completely integrated for different kinds of contactless communication methods and protocols at 13.56 MHz.

The PN512 transceiver ICs support 4 different operating modes

• Reader/Writer mode supporting ISO/IEC 14443A/MIFARE and FeliCa scheme

• Reader/Writer mode supporting ISO/IEC 14443B

• Card Operation mode supporting ISO/IEC 14443A/MIFARE and FeliCa scheme

• NFCIP-1 mode

Enabled in Reader/Writer mode for ISO/IEC 14443A/MIFARE, the PN512’s internal transmitter part is able to drive a reader/writer antenna designed to communicate with ISO/IEC 14443A/ MIFARE cards and transponders without additional active circuitry.

The receiver part provides a robust and efficient implementation of a demodulation and decoding circuitry for signals from ISO/IEC 14443A/MIFARE compatible cards and transponders. The digital part handles the complete ISO/IEC 14443A framing and error detection (Parity & CRC).

The PN512 supports MIFARE 1K or MIFARE 4K emulation products. The PN512 supports contactless communication using MIFARE higher transfer speeds up to 424 kbit/s in both directions.

Enabled in Reader/Writer mode for FeliCa, the PN512 transceiver IC supports the FeliCa communication scheme. The receiver part provides a robust and efficient implementation of the demodulation and decoding circuitry for FeliCa coded signals. The digital part handles the FeliCa framing and error detection like CRC. The PN512 supports contactless communication using FeliCa Higher transfer speeds up to 424 kbit/s in both directions.

The PN512 supports all layers of the ISO/IEC 14443B reader/writer communication scheme, given correct implementation of additional components, like oscillator, power supply, coil etc. and provided that standardized protocols, e.g. like ISO/IEC 14443-4 and/or ISO/IEC 14443B anticollision are correctly implemented.

In Card Operation mode, the PN512 transceiver IC is able to answer to a reader/writer command either according to the FeliCa or ISO/IEC 14443A/MIFARE card interface scheme. The PN512 generates the digital load modulated signals and in addition with an external circuit the answer can be sent back to the reader/writer. A complete card functionality is only possible in combination with a secure IC using the S2C interface. Additionally, the PN512 transceiver IC offers the possibility to communicate directly to an NFCIP-1 device in the NFCIP-1 mode. The NFCIP-1 mode offers different communication mode and transfer speeds up to 424 kbit/s according to the Ecma 340 and ISO/IEC 18092 NFCIP-1 Standard. The digital part handles the complete NFCIP-1 framing and error detection.

Various host controller interfaces are implemented:

• 8-bit parallel interface1

• SPI interface

• serial UART (similar to RS232 with voltage levels according pad voltage supply)

• I2C interface.

PN512主要特点和优势:

Highly integrated analog circuitry to demodulate and decode responses

Buffered output drivers for connecting an antenna with the minimum number of external components

Integrated RF Level detector

Integrated data mode detector

Supports ISO/IEC 14443 A/MIFARE

Supports ISO/IEC 14443 B Read/Write modes

Typical operating distance in Read/Write mode up to 50 mm depending on the antenna size and tuning

Typical operating distance in NFCIP-1 mode up to 50 mm depending on the antenna size and tuning and power supply

Typical operating distance in ISO/IEC 14443A/MIFARE card or FeliCa Card Operation mode of about 100 mm depending on the antenna size and tuning and the external field strength

Supports MIFARE 1K or MIFARE 4K emulation encryption in Reader/Writer mode

ISO/IEC 14443A higher transfer speed communication at 212 kbit/s and 424 kbit/s

Contactless communication according to the FeliCa scheme at 212 kbit/s and 424 kbit/s

Integrated RF interface for NFCIP-1 up to 424 kbit/s

S2C interface

Additional power supply to directly supply the smart card IC connected via S2C &#1048708; Supported host interfaces

SPI up to 10 Mbit/s

I2C-bus interface up to 400 kBd in Fast mode, up to 3400 kBd in High-speed mode

RS232 Serial UART up to 1228.8 kBd, with voltage levels dependant on pin voltage supply

8-bit parallel interface with and without Address Latch Enable

FIFO buffer handles 64 byte send and receive

Flexible interrupt modes

Hard reset with low power function

Power-down mode per software

Programmable timer

Internal oscillator for connection to 27.12 MHz quartz crystal

2.5 V to 3.6 V power supply

CRC coprocessor

Programmable I/O pins

Internal self-test
20110713140119971.gif
图1.PN512方框图
2011071314011942.gif
图2.PN512读/写形式
20110713140119789.gif
图3.PN512 ISO/IEC 14443 A/MIFARE读/写器通讯框图
20110713140119647.gif
图4.PN512 FeliCa读/写器形式通讯框图
20110713140119900.gif
图5.PN512 NFCIP-1 形式通讯框图
20110713140120764.gif
图6.PN512 尺度应用电路

PN51x 演示板

This document describes the functionality of the demonstration reader based on the PN51x. It includes the functional and electrical specifications and gives the needed details to use this reader as a reference design.

This reader implementation is based on the HVQFN32 package of the PN51x device.

PN51x 演示板主要特点:

• Single 5 V up to 12 V unregulated external power supply

• RS232 DSUB9 connector for easy connection to a host PC

• Regulated voltage supply for all supply voltages

• PN51x Variable Supply Voltage

− TVDD = AVDD = DVDD: adjustable, 3.3V or 2.8 V

− PVDD: adjustable, 1.8V or equal to DVDD

− SVDD: adjustable, 1.8V, 2.8V or 3.3V

• NRESET, IRQ signals externally accessible

• Support of S2C interface

• Analog test signal pins AUX1 and AUX2

• Digital test signal pins D6, D5, D4, D3, D2 and D1 depending on the interface

• Breakable line between serial RS232 and PN51x section

• Breakable line between serial PN51x and antenna matching section

• Breakable line between antenna matching and antenna section

• PN51x reader section can be connected via:

− Serial UART

− I2C

− SPI

• Antenna size: 33.5 mm x 51.0 mm
20110713140121564.gif
图7.PN51x 演示板电路图
20110713140121448.gif
图8.PN51x 演示板电路图:电源
20110713140123712.gif
图9.PN51x 演示板电路图:天线婚配和天线部门
20110713140123161.gif
图10.PN51x 演示板电路图:完全的天线电路
20110713140124823.gif
图11.PN51x 演示板PCB结构图
20110713140124292.gif
图12.PN512和天线间的镌汰年夜和婚配
20110713140124891.gif
图13.PN51x 演示板吸收器电路图

基于PN512的OM5597/RD2612 POS参考设计

OM5597/RD2612 is a reference design of a cost effective EMV compliant Point of Sales Terminal based on NXP components. It provides an EMV Level 1 compliant software stack for contactless as well as contact payment based on PN512/C2 and TDA8026.
20110713140124934.gif
图14.基于PN512的OM5597/RD2612 POS参考设计框图
概略请见:


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